2nd
IEEE Inter. Symposium on Industrial Embedded Systems
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Keynote:
When less means more; and
more, the-same?
ABSTRACT: Few technologies have had such a profound influence on every aspect of human life as Electronics, and its offspring Microelectronics. In the last 30-50yrs it (they) has penetrated our lived and now underpin almost everything we do and use, to the extent that economies and even civilization itself would fail very rapidly if for any reason it were to be removed. Perhaps for that reason it has periodically attracted harbingers of doom ... and time and again they have been shown wrong as the threatening milestones were met then passed-by through the power of repeated engineering innovation. As a result today's industry is convinced of its 'super-human' ability to continue to overcome any future obstacles that will emerge in its avid pursuit of Moore's Law; where smaller and smaller geometries, give increased functionality and lower cost. Of course we know this confidence is ultimately misplaced, as there are known physical limits beyond which it is impossible to go. And as the geometries of silicon technology approach those dimensions; the issue of immediate concern should be "when" not "if"! A side effect of the modern can-do mantra is greater concern with the solution than the problem. So the relative silence from the fabrication-industry about the increasing yield/variability issues of smaller geometry processes does not get recognized by the design or system community who are dependent on it. As "no-news is good-news", it's business-as-normal through the product life-cycle ... More of the same? So whilst silicon shrinking may continue for ~15 years before we approach atomic dimensions themselves, second-order factors are already rising to the surface and will dominate the agenda a long time before that. We are familiar with the rising Mask and Design costs, but if we dig a little deeper we see the onset of increased Variability, Wear-out, Particle sensitivity and, Hard and Soft Defects. Add to this the additional engineering caused by Power and Leakage Management ... and of course Design itself, System Verification and Certification. Individually these may be surmountable problems, but collectively they are already a formidable obstacle. Further, their severity is due to increase exponentially with every geometry shrink. This will be the start of an era where we have more silicon 'capacity' than we have the ability to use it; so the value of ever smaller geometries is no-longer obvious. The evidence of all of this is clear if we chose to see it. But our can-do society is not really interested in that 'negative' perspective, only the 'positive'; what can be done about it? And perhaps this is the right way to handle it; after all in business it is not necessary to be perfect or even theoretical best; only to be better than your competitors! Indeed nature of business is a factor to be considered. Products may depend on technology, but the service they offer is never technology. A Product is a package of valuable services; and it is well to remember that technology is (just) a means to that end. Businesses are based on innovation, and innovation is only dependent on advanced technology when there is no other way of achieving the result. When capacity exceeds need (or ability to use!) then Disruption to the status-quo will occur [1]. So if for any reason 'we' are unable to make use of the capacity available in the 'new' processes, then the product companies will turn to an alternative! What sort of alternatives? Well I predict an increased use of configurable reusable technology (See Makimoto's Wave [2]) ... Configurable and programmable, standard products and architectures, will offer cost design-time benefits amortizing the higher cost of development through market consolidation. Requirements for increased tolerance to defects (robustness) will lead to parallel architectures, and the requirement for portability lead to high(er)-level design sign-off. This is not the end for ASIC and Semi-Custom, neither is it the dominance of 'Software', or FPGA ... But it is a sign-post for an analysis based top-to-middle, reuse based, design methodology; based on an underlying scaleable platform architecture model. The problem ... Though these issues are here now, and will only get worse; there is no real signs of panic; and worse still (and possibly as a consequence), no sign of the cavalry!
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